Principal PLL Design Engineer
Celero Communications · Ottawa
Publié le 16 septembre 2026
Description du poste
Principal PLL Design Engineer About the job Are you a PLL Design Engineer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI? We are looking for a High-Speed CMOS PLL Analog Design Engineer –who is excited to join a fast-growing Start-Up Company with a key role for expert in clocking circuits for next generation optical transceivers, high-speed SerDes, and ADC/DAC systems. Candidate will have the opportunity to architect a…
Ceci est un extrait. L'annonce complète se trouve sur le site d'origine.Lire l'annonce complète →
Autres offres chez Celero Communications
Celero Communications recrute aussi pour 5 autres postes dans la région :
- DSP - Optical Design Engineer · Ottawa
- Principal High-Speed Analog Layout Design Engineer · Ottawa
- ASIC Design Engineer – DSP / Analog / SerDes · Ottawa
- ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal · Ottawa
- Principal Analog Design Engineer · Ottawa
