Principal ASIC Design Engineer

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise.

Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we've united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.

Responsibilities

• Work as part of a world class ASIC design team, building leading edge chips for the Coherent Optics market.
• Subsystem development in large mixed signal optical coherent DSP ASICs
• Work with the system architect to define spec/micro-architecture and RTL development
• Design size/timing/power optimization via micro-architecture/RTL/Synthesis
• Layout support for quality final product and TTM

Qualifications

• B.Sc. in Elec/Computer Engineering is a must, higher degrees preferred
• Minimum of 10+ years ASIC design experience
• Solid design (micro-architecture/implementation) and debugging skills
• Strong problem solving skills
• Good verbal/written communication skills and teamwork
• Good knowledge of ASIC design flow/tools, with backend knowledge being a great asset

Assets

• Working knowledge of MatLab and other scripting languages
• Knowledge of OTN, CAUI and other telecom protocols
• Working knowledge of DSP/FEC and communication theories
• Design Experience with ethernet standards 100G to 800G